Dates: September 13th-14th, 20th-21st 2022

Training duration: 24 hours – Time zone: CEST

Instructor: Dr. Antonio Lázaro

Course fees:

 

EARLY BIRD (till August 9th, 2022)

Benefit from 25% of discount on the course fees if you register  before August 9, 2022:

Number of seats: 10

To ensure a good quality of our course the number of seats will be limited to 10. Don’t wait too much to register!

Registration deadline: August 29th, 2022

 

> Register Now

 


Objectives:

 

The AC-DC front-end converter is a critical element in electric-vehicle battery chargers, high power rectifiers for Hydrogen production, generator-side converter in wind turbines, general motor drives, power supplies, aerospace active rectifiers, variable speed diesel generators, etc.

The main objective of this course is to study theoretical aspects and practical aspects of the design of power factor correction (PFC) converters. This type of AC/DC rectifiers have to comply with strict specifications regarding the current harmonics injected to the grid, and more recently with some other Grid-Codes requirements.

The course is designed to provide fundamental knowledge about the design of the power stage (semiconductors, inductors, EMI filters and capacitors selection) and the control system (analog and digital). Regarding the control system, it will be covered from basic analog IC controllers (CCM and BCM) to sophisticated System on Chip (SoC-FPGA) implementation.

This training covers the basis of each topic but it can be considered as mid-level to high-level course focused in the following specific objectives:

Power stage design

Control design

Audience description:

The training course is recommended to everybody interested in the theoretical and practical design aspects of the power stage and analog / digital control applied to the main PFC applications:

Methodology:

The explanations are focused on the concepts and physical meaning. Mathematical developments are also included as reference materials in annexes.

Controller design using SmartCtrl + PSIM simulation to test the results.

A large number of examples are used to show training explanations.

Exercises are proposed to be developed by the audience during the training.

SmartCtrl files and PSIM files are provided in advance to develop efficiently the examples and exercises.


Training information:

 

Instructor:

 

Antonio Lazaro

Antonio Lázaro

 

Antonio Lázaro was born in Madrid, Spain, in 1968. He received the M. Sc. in electrical engineering from the Universidad Politécnica de Madrid, Spain, in 1995. He received the Ph. D. in Electrical Engineering from the Universidad Carlos III de Madrid in 2003.

He has been an Assistant Professor of the Universidad Carlos III de Madrid since 1995. He has been involved in power electronics since 1994, participating in more than 80 research and development projects for industry. He holds 10 patents and software registrations and he has published nearly 140 papers in IEEE journals & conferences. His research interests are high-power DC-DC Converters, Power Factor Correction (PFC) Rectifiers, AC-DC inverters (railway and grid-connected applications), modeling and control of switching converters and digital control techniques.

Dr. Lázaro has originated and leaded the development of the Software SmartCtrl. He is the co-founder and technical director of Power Smart Control S.L. a spin-off company of Carlos III University of Madrid focused on the development of SmartCtrl and hardware high added-value control solutions for power electronics (SoC-FPGA control, HIL systems, real-time FPGA variable logging, automatic test-benches, etc.).


Program

Day 1

 

Day 2

09:00 – 10:00 AM

  • SECTION 1: General Aspects
    • Five basic concepts
    • AC/DC conversion requirement and specifications
    • Single-phase topologies and Applications
    • Three-phase topologies and Applications

10:00 – 11:00 AM

  • SECTION 2a: Boost PFC. Topology analysis & power stage design
    • Local and global average and rms magnitudes
    • Power losses calculations
    • Boundary Conduction Mode design
    • Continuous Conduction Mode design

11:00 AM Coffee break (15 minutes) 

11:15 – 12:30 PM

  • SECTION 2b: Totem-Pole PFC, interleaving & Triangular Current mode

    • 1Ph Bridgeless totem-pole
    • 1Ph Bridgeless totem-pole with interleaving
    • 1Ph Bridgeless totem-pole with Triangular-Current-Mode
    • 1Ph Bridgeless totem-pole with Triangular-Current-Mode and interleaving

12:30 – 13:30 PM

  • SECTION 3a : Inductor design, capacitor & semiconductor selection
    • Basic concepts of magnetism
    • Constructive elements of the magnetic components
    • Cores materials and geometries
    • Winding Types and material
    • Design of gapped inductors
    • Design of Iron Powder inductors

13:30 PM Lunch break (1 hour)

14:30 – 15:30 PM

  • SECTION 3a (Cont): Inductor design, capacitor & semiconductor selection
    • Design of gapped inductors
    • Design of Iron Powder inductors

15:30 – 16:30 PM

  • SECTION 3b: Inductor design capacitor & semiconductor selection
    • Capacitor Selection
    • Semiconductor selection
    • Current sensor selection

 

09:00 – 11:00 AM

  • SECTION 4a: Modeling and control of single-phase PFC
    • Basic control structures
    • Modeling the CCM current loop
    • Requirements of the current loop
    • Modeling the CCM voltage loop
    • Multiplier control with UC 3854
    • Modeling the BCM voltage loop
    • Crossover and cusp distortion
    • Converter- EMI filter interaction

11:00 AM Coffee break (15 minutes)

11:15 – 12:15 PM

  • SECTION 4a (Cont): Modeling and control of single-phase PFC
    • The digital current loop
    • p-Resonant compensator
    • The CCM-DCM Problem

12:15 – 13:30 PM

  • SECTION 5a: Three-phase Boost PFC
    • Introduction
    • Current control in stationary reference frame
    • Alfa-beta control structure
    • Alfa-beta current control modeling
    • dq current control

13:30 PM Lunch break (1 hour)

14:30 – 16:30 PM

  • SECTION 5a (Cont.): Three-phase Boost PFC
    • Grid Synchronization
    • Steady-state operation
    • voltage control modeling
    • voltage control design
    • compensating the EMI filter phase delay
    • voltage control Modeling

 

Day 3

 

Day 4

09:00 – 11:00 AM

  • SECTION 5b: Three-phase Vienna Rectifier
    • Introduction
    • Fundamentals and possible implementations
    • Modulator
    • Current control modeling and design
    • Voltage control modeling and design
    • Simulation results

11:00 AM Coffee break (15 minutes)

11:15 – 12:15 PM

  • SECTION 5c: Three-Phase Buck Rectifier
    • Introduction
    • Current space Vector Modulation
    • PWM Modulator
    • Current and voltage control modeling
    • Main input filter Design
    • Simulation results

12:15 – 13:30 PM

  • SECTION 6a: PFC EMI Filter fundamentals
    • Introduction
    • Voltage and current noise sources
    • Peak, quasi-peak and average measurements
    • LISN and typical filter structures

13:30 PM Lunch break (1 hour)

14:30 – 16:30 PM

  • SECTION 6b: Single Phase EMI filter design
    • Design process
    • BCM and CCM Boost Converter Comparison
    • EMI filter size vs PFC inductor size optimization

 

09:00 – 11:00 AM

  •  SECTION 6c: Three-phase EMI filter design
    • Introduction
    • modulator for Vienna rectifier
    • Differential mode and Common mode sources
    • effect of the time step on the FFT
    • differential mode voltage harmonics analysis
    • Common mode voltage harmonic analysis
    • DM filter Design
    • CM filter design
    • DM and CM filter considerations

11:00 AM Coffee break (15 minutes)

11:15 – 13:30 PM

  • SECTION 6d: EMI filter- 3Ph PFC Stability Analysis
    • Introduction
    • EMI Filter Modeling in d-q coordinates (1 stage)
    • EMI Filter Modeling in d-q coordinates (N stage)
    • Input Independence of the 3Ph Boost PFC Rectifier
    • EMI Filter interaction
    • Voltage and current sensors

13:30 PM Lunch break (1 hour)

14:30 – 16:00 PM

  • SECTION 7: Selection of the digital platform for control implementation
    • algorithm and control functions revision
    • DSP/ DSP+ FPGA
    • SoC
    • Example of 3-Pf VSI-PFC control using SoC platform
    • Examples of easy Industrialized Solutions based on SoC technology

 

 

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General conditions for PSIM Training


Please register as early as possible if you plan to attend this e-training. As soon as the minimum of participants is reached, POWERSYS will confirm the course.

Cancellation can be made according to POWERSYS’ General Conditions: In case you cannot attend the workshop after having registred, please contact us as soon as possible at marketing@powersys.fr Please note that POWERSYS will not reimburse any expenses if the e-training is not confirmed. We recommend you to make your arrangements once the e-Training is confirmed.

For French participants: POWERSYS est enregistré en tant que prestataire de formation (auprès du Préfet de la Région Provence-Alpes-Côte d’Azur sous le numéro 93 13 13256 13). Une convention de formation peut être établie sur demande avant la date de formation.


Contact for any additional information: Please feel free to contact us for any further information marketing@powersys.fr

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